From the topic of Memory Read Machine Cycle, I got an example of timing diagram for MVI instruction.

Again in another topic Memory Interfacing, the book shows timing diagram of Memory Read Cycle. Here 8085 provides two signals – IO/M(bar) and RD(bar) to indicate that it is a memory read operation. The IO/M(bar) and RD(bar) can be combined to generate the MEMR(bar) (Memory Read) control signal that can be used to enable the output buffer by connecting to the memory signal RD(bar). And the memory places the data byte from the addressed register during T2, & that is read by the microprocessor before the end of T2. Why in this diagram there is arrow from IO/M to RD and from RD to MEMR?

Both the figure says Memory Read Cycle but there are some differences in the two timing diagrams in M2. Please can anyone explain when to use the first one and when to use the second timing diagram.

1 Answer

The arrow specifies that this line is the one that can be affected due to change in another line.

There are two types broadly: 1. Single line single effect (as in the opcode fetch cycle)2. Multiple line single effect (as in the memory addressing)

As you can see in the opcode fetch cycle, whenever the Rd line changes, there is a change in the AD7 -AD0 lines. So this is a single line with single effect

And, in case of memory addressing, a change in Rd brings a change in MEMR which brings a change in AD7 - AD0 so it is a multiple line with single effect. I'm not sure why the arrow goes from Io/M line.

You might wanna look at the timing diagram of 8085 as a whole on the internet.

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Presentation on theme: 'Index What is an Interface Pins of 8085 used in Interfacing Memory – Microprocessor Interface I/O – Microprocessor Interface Basic RAM Cells Stack Memory.'— Presentation transcript:

1 Index What is an Interface Pins of 8085 used in Interfacing Memory – Microprocessor Interface I/O – Microprocessor Interface Basic RAM Cells Stack Memory. 1

2 8085 Interfacing Pins 8085 Higher Address Bus Lower Address/Data Bus ALE READY A 15 – A 8 AD 7 – AD 0 2

3 Address Bus of 8085 Address Bus – Used to address memory & I/O devices – 8085 has a 16-bit address bus A 15 A 14 A 13 A 12 A 11 A 10 A9A9 A8A8 AD 7 AD 6 AD 5 AD 4 AD 3 AD 2 AD 1 AD 0 Lower-order AddressHigher-order Address Data Bus Used to transfer instructions and data 8085 has a 8-bit data bus Data Bus 3

4 Memory Interface The memory is made up of semiconductor material used to store the programs and data. The types of memory is, – Primary or main memory – Secondary memory 4

5 Primary Memory RAM and ROM are examples of this type of memory. Microprocessor uses it in storing a program temporarily (commonly called loading) and executing a program. Hence the speed of this type of memory should be fast. 5

6 Secondary Memory These are used for bulk storage of data and information. The main examples include Floppy, Hard Disk, CD-ROM, Magnetic Tape etc. Slower and Sequential Access Nature. non-volatile nature. 6

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7 Memory Mapped IO It considers them like any other memory location. – They are assigned a 16-bit address within the address range of the 8085. – The exchange of data with these devices follows the transfer of data with memory. The user uses the same instructions used for memory. 7

8 IO Mapped IO It treats them separately from memory. – I/O devices are assigned a “port number” within the 8-bit address range of 00H to FFH. – The user in this case would access these devices using the IN and OUT instructions only. 8

9 IO mapped IO V/s Memory Mapped IO Memory Mapped IO IO is treated as memory. 16-bit addressing. More Decoder Hardware. Can address 2 16 =64k locations. Less memory is available. IO Mapped IO IO is treated IO. 8- bit addressing. Less Decoder Hardware. Can address 2 8 =256 locations. Whole memory address space is available. 9

10 IO mapped IO V/s Memory Mapped IO Memory Mapped IO Memory Instructions are used. Memory control signals are used. Arithmetic and logic operations can be performed on data. Data transfer b/w register and IO. IO Mapped IO Special Instructions are used like IN, OUT. Special control signals are used. Arithmetic and logic operations can not be performed on data. Data transfer b/w accumulator and IO. 10

11 Basic RAM Cell RAM is a type of computer memory that can be accessed randomly i.e. any location can be accessed any time within chip. It is most common type of memory found in computers, printers etc. It is basically of two types: – SRAM – DRAM 11

12 SRAM SRAM stands for Static Random Access Memory. This memory is made up of flip-flops and stores the bit as a voltage. Each cell requires 6 transistors hence chip has low density but high speed. More expensive and consumes more power. Often known as cache memory in high speed PCs. 12

13 Basic SRAM Cell 13

14 DRAM DRAM stands for Dynamic Random Access Memory. This memory is made up of MOS transistor gates and it stores the bit as charge. High density, low power consumption, cheap as compared to SRAM. Due to leakage of charge requires frequent refreshing and hence extra circuitry. 14

15 Basic DRAM 15
Simcity activation code.

16 ROM ROM is a read only memory. It retains the information even if power is turned off. It contains permanently stored instructions that help in staring up of a computer e.g. BIOS or Basic Input Output System. These are of following three basic types – PROM, EPROM, EEPROM 16

17 PROM The Programmable Read Only Memory can be programmed only once in its lifetime. Information once stored can not be erased. Requires special hardware circuit to program it. 17

18 EPROM Stands for Erasable Programmable Read Only Memory. These ROMs can be erased and programmed again and again. Can be erased with UV light or electricity. Main disadvantage is that it takes 15 to 20 minutes to erase it. 18

19 EEPROM Stands for Electrically Erasable Programmable Read Only Memory. Information can be erased electrically at register level rather than erasing entire information. It requires lesser erasing time. 19

20 Stack It is a part of memory, reserved in RAM, used to temporarily store information during execution of program. Starting address of stack is loaded in “Stack Pointer (SP)” (a 16-bit register). The address pointed to by SP is known as “Top of Stack”, which is always an empty memory location. 20

21 Stack Initialization Stack can be defined anywhere in RAM. But generally it initialized from highest (end) address of RAM to avoid any data loss. FFFFH F000H 0000H STACK MEMORY SP = FFFFH TOP OF STACK 21

22 Size of Stack Memory Theoretically there is no limitation on the size of stack memory. Practically the size of stack memory is limited to the availability of free RAM. As RAM is used to store temporarily program and data during execution, hence only free RAM can be used as stack. 22

23 Storing Data on Stack Stack is Last-In-First-Out (LIFO) type of memory. When information is stored on stack, the Stack Pointer register decrements to point to lower empty address. When information is read from stack, the Stack Pointer register increments to point to higher empty address. 23

24 Animation Stack Memory FFFF FFFE FFFD FFFC FFFB FFFA FFF9 0001 0000 STACK MEMORY PUSH B Stack Pointer PUSH C POP B POP C 52 H B= 52 H FFFF HFFFE H 35 H C = 35 H FFFD H 35 H 52 H 24

25 Advantages of Stack Address is always in Stack Pointer, need not be part of instruction, therefore, stack access is always faster. Stack instructions are short with only one operand. Used to save important data before branch instruction e.g. jump or interrupt instruction. 25